00:22 Intel will be holding an Architecture Summit/Event on 11th December
03:07 Skylake-SP has up to 28-cores, measures 698mm2 and 205W TDP on 14nm
04:44 The new CPU supports Optane/Xpoint persistent memory.
07:58 What about Hyper Threading? Does Cascade Lake even use HT?
10:01 AMD held their Next Horizon event on 6th November and had a great deal to be happy about.
12:08 Rome completely different to Zen EPYC 8x 7nm chips around 14nm IOX chip controls I/O, DDR4 and front side bus. Jim @ AdoredTV nailed it months ago.
Ian Cutress of Anandtech tells us that Intel will be holding an Architecture Summit/Event on 11th December, and Lord knows they need it to be good.
On 5th November Intel announced Cascade Lake-SP and Cascade Lake-AP PDF HERE and the world yawned. Cascade Lake follows on from Purley/Skylake which can be used in configurations up to 8 Sockets.
Skylake-SP has up to 28-cores, measures 698mm2 and 205W TDP on 14nm
We expected Cooper Lake in 2018 and Cascade Lake in 2019, so what happened to Cooper Lake? Cxxxxx Lake was expected to be up to 56-cores, 2x 698mm2 and 350W on 14nm however Cascade Lake-AP (Advanced Performance) is up to 48-cores per socket with 12 channels of DDR4 i.e. a core with double XCC Xeon dies.
The new CPU supports Optane/Xpoint persistent memory.
Cascade Lake-AP has a TDP that is rumoured to be 350W although Intel is not giving a number at present.
Presumably a new socket is coming with 5000 contacts.
What about Hyper Threading? Does Cascade Lake even use HT?
We have heard about different versions of Spectre/Meltdown and now there is another attack called PortSmash
for which the solution is to disable HT
Intel used EPYC 7601 as a comparison and 48 cores/48 threads of Cooper Lake-AP should indeed beat 32 cores of AMD EPYC 7601 with SMT off.
AMD held their Next Horizon event on 6th November and had a great deal to be happy about.
Rome is backwards compatible with Naples and forward compatible with Milan.
Zen 2 Rome in 2019 and Zen 3 Milan in 2020
7nm is claimed to only deliver 25 percent increase in performance over 14nm
AMD talked about a partnership with TSMC and also EDA to deliver 7nm.
Zen 2 has 2nd Gen. Infinity Fabric
Rome is completely different to Zen EPYC with eight 7nm chips arranged around a huge 14nm IOX chip that controls I/O, DDR4 and front side bus.
This would have had more impact if it hadn't been leaked by Jim of Adored TV a couple of months ago. Well done Jim I say, he took a risk at the time publicly and nailed it 100%.
The obvious point is that Intel compared their not-yet-released chip with 1st Gen. EPYC when 2nd Gen EPYC has been out for validation for a while. Intel cannot officially check out EPYC, they must surely be aware of how it is performing.
The fact that Intel sent out the Xeon press release the day before AMD's event rather smacks of desperation.
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